[Dart-dev] DART/branches Revision: 11826

dart at ucar.edu dart at ucar.edu
Tue Jul 18 10:20:08 MDT 2017


hendric at ucar.edu
2017-07-18 10:20:08 -0600 (Tue, 18 Jul 2017)
25

updating documentation




Modified: DART/branches/rma_array_nml/assimilation_code/modules/assimilation/filter_mod.html
===================================================================
--- DART/branches/rma_array_nml/assimilation_code/modules/assimilation/filter_mod.html	2017-07-18 16:04:09 UTC (rev 11825)
+++ DART/branches/rma_array_nml/assimilation_code/modules/assimilation/filter_mod.html	2017-07-18 16:20:08 UTC (rev 11826)
@@ -80,8 +80,8 @@
 <pre>
 &amp;filter_nml
    single_file_in               = .false.,
-   input_state_files            = 'null',
-   input_state_file_list        = 'null',
+   input_state_files            = '',
+   input_state_file_list        = '',
    init_time_days               = 0,
    init_time_seconds            = 0,
    perturb_from_single_instance = .false.,
@@ -90,8 +90,8 @@
    stages_to_write              = 'output'
 
    single_file_out              = .false.,
-   output_state_files           = 'null',
-   output_state_file_list       = 'null',
+   output_state_files           = '',
+   output_state_file_list       = '',
    output_interval              = 1,
    output_members               = .true.,
    num_output_state_members     = 0,

Modified: DART/branches/rma_array_nml/assimilation_code/modules/assimilation/filter_mod.nml
===================================================================
--- DART/branches/rma_array_nml/assimilation_code/modules/assimilation/filter_mod.nml	2017-07-18 16:04:09 UTC (rev 11825)
+++ DART/branches/rma_array_nml/assimilation_code/modules/assimilation/filter_mod.nml	2017-07-18 16:20:08 UTC (rev 11826)
@@ -1,7 +1,7 @@
 &filter_nml
    single_file_in               = .false.,
-   input_state_files            = 'null'
-   input_state_file_list        = 'null'
+   input_state_files            = ''
+   input_state_file_list        = ''
    init_time_days               = 0,
    init_time_seconds            = 0,
    perturb_from_single_instance = .false.,
@@ -10,8 +10,8 @@
    stages_to_write              = 'output'
 
    single_file_out              = .false.,
-   output_state_files           = 'null'
-   output_state_file_list       = 'null'
+   output_state_files           = ''
+   output_state_file_list       = ''
    output_interval              = 1,
    output_members               = .true.
    num_output_state_members     = 0,

Modified: DART/branches/rma_array_nml/assimilation_code/programs/model_mod_check/model_mod_check.f90
===================================================================
--- DART/branches/rma_array_nml/assimilation_code/programs/model_mod_check/model_mod_check.f90	2017-07-18 16:04:09 UTC (rev 11825)
+++ DART/branches/rma_array_nml/assimilation_code/programs/model_mod_check/model_mod_check.f90	2017-07-18 16:20:08 UTC (rev 11826)
@@ -181,7 +181,7 @@
                        num_copies   = num_ens,      &
                        cycling      = single_file,  &
                        single_file  = single_file,  & 
-                       restart_list = input_state_files)
+                       restart_files = input_state_files)
 
 do imem = 1, num_ens
    write(my_base,'(A,I2)') 'inens_',    imem
@@ -202,7 +202,7 @@
                        num_copies   = num_ens,     &
                        cycling      = single_file, &
                        single_file  = single_file, &
-                       restart_list = output_state_files)
+                       restart_files = output_state_files)
       
 do imem = 1, num_ens
    write(my_base,'(A,I2)') 'outens_',    imem


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