[Dart-dev] DART/branches Revision: 11029

dart at ucar.edu dart at ucar.edu
Wed Feb 8 10:59:33 MST 2017


hendric at ucar.edu
2017-02-08 10:59:33 -0700 (Wed, 08 Feb 2017)
45
updating workshop namelists for lorenz_63.





Modified: DART/branches/rma_single_file/models/lorenz_96/work/input.nml
===================================================================
--- DART/branches/rma_single_file/models/lorenz_96/work/input.nml	2017-02-08 17:49:02 UTC (rev 11028)
+++ DART/branches/rma_single_file/models/lorenz_96/work/input.nml	2017-02-08 17:59:33 UTC (rev 11029)
@@ -56,7 +56,7 @@
    output_mean      = .true.
    output_sd        = .true.
 
-   inf_flavor                  = 2,                       0,
+   inf_flavor                  = 0,                       0,
    inf_initial_from_restart    = .false.,                 .false.,
    inf_sd_initial_from_restart = .false.,                 .false.,
    inf_deterministic           = .true.,                  .true.,
@@ -84,7 +84,7 @@
 # doing a successful assimilation, change cutoff to 0.02 and rerun.
 &assim_tools_nml
    filter_kind                     = 1,
-   cutoff                          = 0.02,
+   cutoff                          = 1000000.0,
    sort_obs_inc                    = .false.,
    spread_restoration              = .false.,
    sampling_error_correction       = .false.,

Modified: DART/branches/rma_single_file/models/lorenz_96/work/input.workshop.nml
===================================================================
--- DART/branches/rma_single_file/models/lorenz_96/work/input.workshop.nml	2017-02-08 17:49:02 UTC (rev 11028)
+++ DART/branches/rma_single_file/models/lorenz_96/work/input.workshop.nml	2017-02-08 17:59:33 UTC (rev 11029)
@@ -2,8 +2,8 @@
    start_from_restart       = .true.,
    output_restart           = .true.,
    async                    = 0,
-   restart_in_file_names    = "perfect_ics.nc",
-   restart_out_file_names   = "perfect_restart.nc",
+   restart_files_in         = "perfect_input.nc",
+   restart_files_out        = "perfect_restart.nc",
    init_time_days           = 0,
    init_time_seconds        = 0,
    first_obs_days           = -1,
@@ -18,6 +18,9 @@
    output_timestamps        = .false.,
    print_every_nth_obs      = -1,
    output_forward_op_errors = .false.,
+   single_file_in           = .true.
+   single_file_out          = .true.
+   has_cycling              = .true.
    silence                  = .false.,
    /
 
@@ -27,8 +30,8 @@
    ens_size                 = 20,
    obs_sequence_in_name     = "obs_seq.out",
    obs_sequence_out_name    = "obs_seq.final",
-   input_restart_file_list  = "restart_list_in.txt",
-   output_restart_file_list = "restart_list_out.txt",
+   input_restart_file_list  = "restart_in.txt",
+   output_restart_file_list = "restart_out.txt",
    init_time_days           = 0,
    init_time_seconds        = 0,
    first_obs_days           = -1,
@@ -43,8 +46,9 @@
    output_timestamps        = .false.,
    trace_execution          = .false.,
    silence                  = .false.,
-   single_file_in           = .false.,
-   single_file_out          = .false.,
+   single_file_in           = .true.,
+   single_file_out          = .true.,
+   has_cycling              = .true.,
    perturb_from_single_instance = .false.,
 
    stages_to_write  = 'output'
@@ -248,9 +252,9 @@
 /
 
 &integrate_model_nml
-   trace_execution          = .true.
-   input_restart_file_list  = "restart_list_in.txt"
-   output_restart_file_list = "restart_list_out.txt"
+   trace_execution = .true.
+   ic_file_name    = 'temp_ic.nc'
+   ud_file_name    = 'temp_uc.nc'
 /
 
 &model_mod_check_nml
@@ -267,7 +271,7 @@
   interp_test_dz      = 0.2
   interp_test_vertcoord = 'VERTISHEIGHT'
   test1thru             = 9
-  input_restart_list  = 'restart_list_in.txt'
-  output_restart_list = 'restart_list_out.txt'
+  input_restart_list  = 'restart_in.txt'
+  output_restart_list = 'restart_out.txt'
   verbose               = .true.
   /


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